Michael Schaffner
513f5a446f
Fix Makefile
2018-09-13 17:54:07 +02:00
Michael Schaffner
a69ae36456
Update axi_node submodule, add axi submodule.
2018-09-13 17:54:07 +02:00
Michael Schaffner
028c20cd88
Modify Makefile (clean target)
2018-09-13 17:54:07 +02:00
Michael Schaffner
bd83037fe5
Fix Travis CI
2018-09-13 16:35:27 +02:00
Michael Schaffner
68d4bd1bfc
Fix CI
2018-09-13 16:32:39 +02:00
Michael Schaffner
b776416a7b
Add torture test targets to Makefile and fix CI flows
2018-09-13 13:27:31 +02:00
Michael Schaffner
42d80bd2ba
Add torture test targets to Makefile and fix CI flows
2018-09-13 13:23:51 +02:00
Michael Schaffner
54010e961a
Add torture test to CI
2018-09-13 11:42:16 +02:00
Michael Schaffner
1044f75c6b
Merge branch 'ariane_next' into serpent
2018-09-12 18:40:39 +02:00
Michael Schaffner
7ddee4d0e7
Bump GCC version to 7.2 in CI flows
2018-09-12 18:07:53 +02:00
Michael Schaffner
d521bb8c2f
Add missing tests (rv64um) to verilator runs
2018-09-12 17:58:09 +02:00
Michael Schaffner
fa3aab09d7
Fix Makefile
2018-09-12 17:57:54 +02:00
Michael Schaffner
90bdd53428
Update axi_node submodule, add axi submodule.
2018-09-12 17:56:56 +02:00
Michael Schaffner
d4e3b34827
Modify Makefile (clean target)
2018-09-12 17:56:47 +02:00
Michael Schaffner
c47cd6c268
Bump GCC version to 7.2 in CI flows
2018-09-12 17:36:36 +02:00
Florian Zaruba
25dae772b3
Fix Questa flow
2018-09-12 17:36:15 +02:00
Florian Zaruba
854d143932
Merge remote-tracking branch 'origin/ariane_next' into fpnew
2018-09-11 18:48:33 +02:00
Florian Zaruba
0d0f2682b8
Split frontend modules to separate files
2018-09-11 18:34:25 +02:00
Florian Zaruba
3a9a0b7a58
Merge floating point support
2018-09-11 13:43:04 +02:00
Florian Zaruba
54124944fa
Merge remote-tracking branch 'origin/ariane_next' into fpnew
2018-09-11 12:08:12 +02:00
Florian Zaruba
db846a6c75
Merge remote-tracking branch 'origin/ariane_next' into fpnew
2018-09-11 12:00:48 +02:00
Florian Zaruba
92f18e6550
Merge remote-tracking branch 'origin/ariane_next'
2018-09-11 11:53:53 +02:00
Florian Zaruba
5ff7ed4832
Fix Questa flow
2018-09-11 11:51:20 +02:00
Florian Zaruba
8af65d10a1
Fix Questa flow
2018-09-11 11:48:35 +02:00
Florian Zaruba
9ab76b9243
Switch CDC implementation to safer variant
2018-09-07 17:01:59 +02:00
Michael Schaffner
04b581a344
Add missing tests (rv64um) to verilator runs
2018-09-06 19:48:55 +02:00
Michael Schaffner
4dab2ed889
Fix Makefile
2018-09-06 19:48:46 +02:00
Michael Schaffner
38c3114c32
Add serpent cache tests to CI script
2018-09-06 18:07:28 +02:00
Michael Schaffner
93a0c31faa
Rename caches, add define switch to swap cache systems
2018-09-06 18:07:20 +02:00
Michael Schaffner
e8b3116780
Update axi_node submodule, add axi submodule.
2018-09-06 13:32:14 +02:00
Michael Schaffner
9a89fa66d8
Modify Makefile (clean target)
2018-09-06 13:32:13 +02:00
Michael Schaffner
b9cb04c434
Exchange lfsr with lfsr_8bit module from common_cells
2018-09-06 13:32:12 +02:00
Florian Zaruba
af3182b860
Clean-up and fpga preparataion
...
- fix CDC
- Bump repo versions
- Fix interface issue with bypassed read/writes
2018-09-06 12:08:50 +02:00
Michael Schaffner
46c066f32d
Exchange lfsr with lfsr_8bit module from common_cells
2018-09-06 08:00:08 +02:00
Michael Schaffner
9fa86499c3
fix synthesis issue (latches, unreachable fsm states)
2018-08-31 13:10:56 +02:00
Michael Schaffner
0d2803abc9
move cache-specific files to separate folder
2018-08-31 13:00:00 +02:00
Michael Schaffner
5b29462bc4
implement l15 adapter
2018-08-31 12:58:15 +02:00
Michael Schaffner
cb01e46f75
move cache-specific files to separate folder
2018-08-31 12:58:07 +02:00
Michael Schaffner
38a42055c1
change fifo module names to fifo_v2 to stay compatible with common_cells submodule
2018-08-27 15:04:39 +02:00
Michael Schaffner
a6a1af9af8
revert sram wrapper interface and module name
2018-08-24 19:24:29 +02:00
Michael Schaffner
cca0d66fab
switch to common_cells repo, remove redundant files, cleanup + benderize
2018-08-24 16:22:49 +02:00
Michael Schaffner
4f7bd54065
add fpga-support submodule, exchange srams with inferrable blockrams, remove flat byte enables
...
switch icache to inferrable blockrams
exchange sram with regfile
switched sram to sram_wrapper in testharness
replace dirty/valid sram with regfile
replace behav_sram with fpga inferrable ram
remove flat byte enables
fix in makefile
add reset to valid regs
2018-08-24 12:23:50 +02:00
Michael Schaffner
8e89f62181
⚡ restructure travis and gitlab-ci flow scripts and make targets
...
* fix typo in signal naming and make axi_adapter questa-sim compliant
2018-08-22 17:21:42 +02:00
Florian Zaruba
238dbf8f04
Merge remote-tracking branch 'origin' into ariane_next
2018-08-21 20:22:31 -07:00
msfschaffner
8f0b388ecb
⚡ Cache hierarchy and LSU load unit optimizations
...
* ♻️ restructure hierarchy (move dcache out into ariane/std_cache_subsystem)
* update uvm-components submodule
* ♻️ switch to newer (and better) fifo implementation. redesign of lsu_arbiter to improve on timing.
* ♻️ restructure hierarchy (move dcache out into ariane/std_cache_subsystem)
* ♻️ move icache out to cache_subsystem. connect icache performance counter.
* ♻️ code cleanup
* ♻️ rewrote sign extension mux to decrease comb. delay
* provision additional logic for FLW, FLH, FLB in load_unit
* code cleanup, add efficient RR arbiter with lookahead capability
* change portnames in ariane_wrapped.sv for verilator TB
2018-08-18 11:03:09 -07:00
Florian Zaruba
5a2a86f333
🚨 Fix some verilator lint warnings
2018-08-01 20:25:15 -07:00
Florian Zaruba
bba2485c90
Add msip field
2018-08-01 18:07:42 -07:00
Florian Zaruba
929ef3bb54
Update device tree and fix possible LSU deadlock
2018-08-02 02:02:47 +02:00
Florian Zaruba
ddd68fd39a
Merge remote-tracking branch 'origin/riscv-compliant-debug' into fpnew
2018-07-31 21:28:38 -07:00
Florian Zaruba
126520bf8f
⚡ Make tracing optional
2018-08-01 02:17:17 +02:00
