Commit graph

488 commits

Author SHA1 Message Date
Florian Zaruba
bfae40e2a8 ✂️ Move address checker to store queue 2017-06-23 23:37:16 +02:00
Florian Zaruba
ff91fdbfec New LSU arbitration scheme 2017-06-23 22:58:00 +02:00
Florian Zaruba
43959a587b Also check for a request when waiting on a TLB hit 2017-06-23 10:56:05 +02:00
Florian Zaruba
858929f84a 🐛 Fix issue of fetch fifo underflowing 2017-06-23 10:17:06 +02:00
Florian Zaruba
42c93b9901 Fix address translation in tracer 2017-06-23 10:09:25 +02:00
Florian Zaruba
45d4966c16 🐛 Fix missed ld/st instruction 2017-06-22 19:05:41 +02:00
Florian Zaruba
e0d0b391f0 💚 Fix building scoreboard test 2017-06-22 16:05:30 +02:00
Florian Zaruba
6c8cb9f80f 🐛 Fix prediction only fetching half an instr 2017-06-22 15:48:32 +02:00
Florian Zaruba
773efe42a8 🐛 Fix exception not taken problem 2017-06-22 15:32:01 +02:00
Florian Zaruba
fc7969b385 Simplifying load unit 2017-06-22 12:44:36 +02:00
Florian Zaruba
0d2851770b 🐛 Fixes in branch logic 2017-06-21 20:26:06 +02:00
Florian Zaruba
34519aa8d0 🐛 Fix in branch delay slot instruction taken 2017-06-21 19:23:21 +02:00
Florian Zaruba
f6f33eafaf i✂️ Add separate issue stage 2017-06-21 18:58:37 +02:00
Florian Zaruba
a6711fd330 🐎 Improve timing 1.65 -> 1.60 2017-06-21 18:26:10 +02:00
Florian Zaruba
a924dc96f4 Register stage between decode and issue 2017-06-21 16:49:32 +02:00
Florian Zaruba
332c048b8a Removed flush issue from scoreboard
If an branch instruction is issued the consecutive instruction can't
enter until the branch is resolved.
2017-06-21 14:46:34 +02:00
Florian Zaruba
de2fced8c4 🐛 Various fixes (illegal, dirty) 2017-06-21 13:01:52 +02:00
Florian Zaruba
3c7c45ff1b Fix in calculating index into btb 2017-06-20 18:42:54 +02:00
Florian Zaruba
848a06ef77 🐛 Fixes in new LSU interface 2017-06-20 16:56:12 +02:00
Florian Zaruba
81c18a9871 Major revision of load/store interface 2017-06-20 16:31:08 +02:00
Florian Zaruba
7137e964fb 🐎 Improve timing 1.85 -> 1.65 2017-06-20 13:00:03 +02:00
Florian Zaruba
df88975656 Break store path AGU separate unit 2017-06-19 20:03:39 +02:00
Florian Zaruba
f74d7728bc 🐎 Improve timing from 2.1 -> 1.85 2017-06-19 16:17:13 +02:00
Florian Zaruba
465b090532 Output load exception one cycle later 2017-06-19 15:23:14 +02:00
Florian Zaruba
b71bda2edd 🐎 Improve timing from 2.25 -> 2.1 2017-06-19 15:10:21 +02:00
Florian Zaruba
ab71983328 🎨 Beautify code, fix #26 2017-06-19 11:04:54 +02:00
Florian Zaruba
975ef03f81 📝 Update header files 2017-06-18 21:54:35 +02:00
Florian Zaruba
1701a8a784 :Fix: Misaligned page exceptions, add dirty test 2017-06-18 21:50:28 +02:00
Florian Zaruba
8352e83ed1 D$ now aware of kill request signal 2017-06-18 16:19:58 +02:00
Florian Zaruba
e13929f246 Initialize .bss section 2017-06-18 15:00:13 +02:00
Florian Zaruba
2fb0ccf108 Merge branch 'sv39' of iis-git.ee.ethz.ch:floce/ariane into sv39 2017-06-18 00:14:40 +02:00
Florian Zaruba
8aabbfd827 Exception display -> tracer, fix load v/paddr 2017-06-18 00:13:05 +02:00
Florian Zaruba
2789bceff9 Instr tracer write to file, fix in kill req signal 2017-06-18 00:13:05 +02:00
Florian Zaruba
f6a9fd675c Add support for addr translation in instr tracer 2017-06-18 00:13:04 +02:00
Florian Zaruba
14152914f4 Implement SFENCE.VMA logig, fix issue #47 2017-06-18 00:13:04 +02:00
Florian Zaruba
6cfd969f36 🐛 Un-stall LSU when flushing the pipeline 2017-06-18 00:13:04 +02:00
Florian Zaruba
9c9e2a4ba4 🐛 Fix PTW return empty TLB entry and w flag 2017-06-18 00:13:04 +02:00
Florian Zaruba
2570aa4bb1 🐛 Fix missing flush in PTW 2017-06-18 00:13:04 +02:00
Florian Zaruba
d59ab86e10 Remove latch from fetch FSM 2017-06-18 00:13:04 +02:00
Florian Zaruba
3d6d3e912f Implement address translation data interface 2017-06-18 00:13:03 +02:00
Florian Zaruba
e860cc4c91 Add page fault exceptions to displayer 2017-06-18 00:13:03 +02:00
Florian Zaruba
74901ae86e Update PTW to latest specification (1.11 WIP) 2017-06-18 00:13:03 +02:00
Florian Zaruba
837bf492ef Adapt PTW to D$ interface, clean-up 2017-06-18 00:13:03 +02:00
Florian Zaruba
aec6cb0ded Add page fault exception codes 2017-06-18 00:13:03 +02:00
Florian Zaruba
a5adaa44a7 🐛 Fix in sret and outdated WB 2017-06-18 00:13:02 +02:00
Florian Zaruba
322f53bc3c 🐛 Fix overwriting valid in SBE, store valid 2017-06-18 00:13:02 +02:00
Florian Zaruba
dbc6f6a710 Fix syntax error in concatenation 2017-06-18 00:13:02 +02:00
Florian Zaruba
b3b862cda2 Make ASID bits sticky 2017-06-18 00:13:02 +02:00
Florian Zaruba
97a305561b Fix issue #24 2017-06-18 00:13:02 +02:00
Florian Zaruba
8e5f93c6d8 Fix port size mis-match 2017-06-18 00:13:02 +02:00