Commit graph

893 commits

Author SHA1 Message Date
Jordan Carlin
97e183c58f
Update Sail config files 2025-06-27 00:08:47 -07:00
David Harris
7dc9a013fc Temporarily roll back to G=0 so riscof runs ACTs. Revert this when ACT handles G=4 2025-06-11 10:01:58 -07:00
Jordan Carlin
5f981f628e
Update Sail 2025-06-06 22:07:36 -07:00
David Harris
60ea8a88b4 Fixed fpu flags coverage 2025-06-01 07:31:32 -07:00
David Harris
64a0185c92 Set Spike pmpgranularity based on yaml 2025-06-01 03:56:35 -07:00
David Harris
34f8b8f3e7 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2025-05-28 06:01:43 -07:00
Jordan Carlin
9b1964e928
Update Sail config files 2025-05-27 20:51:13 -07:00
jacassidy
70b9384068 changes to fix makefile for riscof and run vector excpetions coverage 2025-05-27 18:24:16 -07:00
David Harris
1c0fb856e7
Merge pull request #1427 from georgiatai/devcvw
Changes in wally, sail, and spike config to support vector verification
2025-05-27 08:40:43 -07:00
David Harris
e86620f3d0 PMP grain test fixes 2025-05-27 03:23:00 -07:00
David Harris
e0af0e68a3
Merge pull request #1416 from coreyqh/ccov
otherpagefault ccov hole covered
2025-05-27 03:07:06 -07:00
Georgia Tai
10648e9ccb spike update 2025-05-22 13:12:22 -07:00
Georgia Tai
e96eb3a95d riscof and config changes to support vector 2025-05-22 13:06:49 -07:00
David Harris
9dc82f38fc Initial trickbox 2025-05-21 10:26:32 -07:00
David Harris
56e6749eec
Merge pull request #1411 from rosethompson/main
Fixes Misalgined Instruction Page Fault
2025-05-14 10:46:55 -07:00
Jordan Carlin
42989867de
Workaround binutils 2.44 objdump 6-byte instruction bug in coverage/fpu.S 2025-05-13 17:42:08 -07:00
Jordan Carlin
544f3b4af9
Fix riscv-config isa yaml for compatability with latest RISCOF for PMP 2025-05-13 00:55:56 -07:00
Corey Hickson
a3a3c18052 otherpagefault ccov hole covered 2025-05-10 19:35:15 -07:00
Jordan Carlin
ee961021d6
Restore deleted pmp test 2025-05-10 17:01:35 -07:00
Jordan Carlin
602cc42b03
Enable more tests in Sail 2025-05-10 16:55:47 -07:00
Jordan Carlin
2b1569a281
Enable lots of rv64 wally-riscv-arch-test tests to run in Sail 2025-05-10 16:48:50 -07:00
Jordan Carlin
531c8752f7
Fix riscof configs 2025-05-10 16:21:57 -07:00
Jordan Carlin
f549ee3df7
Update Sail config files 2025-05-10 12:27:55 -07:00
Jordan Carlin
c234aebefb
Fix coverage collection 2025-05-09 17:40:57 -07:00
Jordan Carlin
012272b9c4
Only run coverage for cvw-riscv-arch-test tests 2025-05-09 17:03:09 -07:00
Jordan Carlin
71d52bc6dc
Update to new version of Sail 2025-05-09 16:12:29 -07:00
Jordan Carlin
3b0f763674
Update to work with new version of Sail 2025-05-09 15:43:31 -07:00
Jordan Carlin
af7c219e37
Don't build rv32e 2025-05-09 14:55:18 -07:00
Jordan Carlin
d2ea9a58da
Generate coverage report for riscof makefile 2025-05-09 14:47:23 -07:00
Jordan Carlin
b234f94572
riscof coverage working 2025-05-09 14:47:00 -07:00
Jordan Carlin
25041f4ebb
Add symlinks to coverage.svh files 2025-05-09 14:46:48 -07:00
Jordan Carlin
1f87d87a81
Generate UCDB with riscof plugin 2025-05-09 13:17:55 -07:00
Jordan Carlin
638919d094
Generate trace from Sail log 2025-05-09 11:27:18 -07:00
David Harris
9c2090950b Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2025-05-08 19:55:18 -07:00
David Harris
db1533c6e8
Merge pull request #1414 from coreyqh/ccov
HPTWFaultM in L2_ADR state ccov hole covered
2025-05-08 19:08:07 -07:00
Corey Hickson
4a03114b60 InvalidRead coverage hole filled 2025-05-08 18:26:32 -07:00
Corey Hickson
00bd474b04 HPTWFaultM in L2_ADR state ccov hole covered 2025-05-08 17:31:14 -07:00
David Harris
e3ae285a8e Resolved pmpaddrdec merge 2025-05-08 15:07:52 -07:00
David Harris
56ccd39829
Merge pull request #1410 from jordancarlin/cvw-arch-verif-riscv-arch-test
Flow for running cvw-arch-verif through riscv-arch-test
2025-05-08 14:18:53 -07:00
Rose Thompson
8369e8679e
Merge branch 'openhwgroup:main' into main 2025-05-08 13:21:33 -05:00
Rose Thompson
fe01aed1a6 Created new test for generating misaligned instruction spill across two virtual pages. 2025-05-08 11:35:48 -05:00
David Harris
bed00c80d2
Merge pull request #1409 from jordancarlin/spelling
Fix lots of spelling errors
2025-05-08 04:58:11 -07:00
Jordan Carlin
385e8f6c24
Fix type 2025-05-08 03:43:48 -07:00
Jordan Carlin
1002f3badb
Add support for cvw-riscv-arch-test 2025-05-08 03:12:01 -07:00
Jordan Carlin
3d368d50d7
Revert makefile changes 2025-05-08 02:56:28 -07:00
Jordan Carlin
7c4455e7cc
Continued makefile work 2025-05-08 02:39:38 -07:00
Jordan Carlin
8a9d15cd60
Update riscof Makefile for better scalability with multiple suites 2025-05-08 01:25:09 -07:00
Jordan Carlin
d1958b05e0
Remove old quad64 makefile target 2025-05-08 01:04:59 -07:00
Jordan Carlin
5271234591
Fix lots of spelling errors 2025-05-08 00:18:38 -07:00
Rose Thompson
3f3f5e83fe Good now I'm getting the Instruction page fault mismatch that I want to see. 2025-05-07 16:35:17 -05:00