Commit graph

45 commits

Author SHA1 Message Date
valentinThomazic
fd12ee596c
Add smoke-tests and fpga logs on dashboard (#1928) 2024-03-14 14:43:56 +01:00
valentinThomazic
fde7e856e7
detect old versions of spike (#1910) 2024-03-08 23:54:05 +01:00
Jalali
bb2c6bd41f
Code coverage : Exclude unread module form CC (fix issue #1903) (#1907) 2024-03-08 18:35:01 +01:00
André Sintzoff
8c2bbb0527
cva6.py: fix typos in displayed messages (#1906) 2024-03-08 14:01:19 +01:00
valentinThomazic
a4fc0e9f99
Check tools version before simulation (#1899) 2024-03-07 16:34:10 +01:00
Zbigniew Chamski
4fcdf4ea30
Generate separate per-target logs when simulating. (#1870) 2024-03-05 19:37:57 +01:00
Zbigniew Chamski
16bdcda07c
Improve environment setup. Fix Verilator installation process. (#1864)
* verif/sim/setup-env.sh: Double-quote variable values.  Install Verilator
  in 'tools/verilator' by default.  Add SPIKE_PATH to PATH.
* verif/regress/install-verilator.sh: By default use per-version dirs to
  build and install Verilator.  Add and improve configuration messages.
2024-03-05 17:18:33 +01:00
Jalali
ce0ab81630
Connect CSRs info from RVFI_CSR in the testbench & update simulation target (#1879) 2024-02-28 16:20:24 +01:00
Jalali
514fb86738
Map AXI functional coverage to the HVP (#1867) 2024-02-23 18:04:58 +01:00
Jalali
5dd04829e3
ISA functional coverage : Add directed tests (#1855) 2024-02-21 09:31:54 +01:00
valentinThomazic
cedc21bb35
fixed Verilator detection by tests (#1854) 2024-02-20 19:30:40 +01:00
AEzzejjari
5e80c104c9
AXI agent: Connect the the new AXI agent (#1817) 2024-02-18 23:31:44 +01:00
Jalali
3d7e417bce
Functional coverage : Add cross to illegal and exception coverage models (#1839) 2024-02-18 23:30:11 +01:00
MarioOpenHWGroup
c7f0eaf0d8
Bump verif/core-v-verif from fd68dfd to c7d2077 (#1828) 2024-02-13 14:20:21 +01:00
Zbigniew Chamski
d48c4b5b4e
Fix waveform generation using vcs-uvm. Add waveforms section to README. (#1827) 2024-02-13 12:08:18 +01:00
Jalali
5a9e1efd18
CVA6 HVP : MAP Illegal and exception covergroup into hvp (#1819) 2024-02-09 15:40:05 +01:00
Jalali
877a07c368
CVA6 HVP : Map ZCB instructions & remove DRET instruction (#1812) 2024-02-06 23:38:46 +01:00
JeanRochCoulon
de5d0d7ed4
cv32a65x (#1799) 2024-02-01 13:11:45 +01:00
Guillaume Chauvon
e0ca60169b
Fix path for vcs init_testharness.do (#1780) 2024-01-24 17:49:02 +01:00
Jalali
cabbaf690d
Exclude cva6_rvfi_combi module from Code coverage (#1773) 2024-01-22 17:16:02 +01:00
MarioOpenHWGroup
8b6e8295f8
Add priv level to cva6.py and fix smoke-tests (#1768) 2024-01-17 23:14:19 +01:00
Jalali
4279cc0f6e
Fix CSR coverage model & HVP (#1751) 2024-01-09 11:55:09 +01:00
valentinThomazic
706daa0a3b
removed the usage of install-cva6.sh and add setup-env.sh (#1741) 2024-01-03 13:42:23 +01:00
Anouar
8aca3438ee
Added CSR covegroups for read and write operations, hvp updated accordantly (#1706) 2023-12-21 13:54:20 +01:00
valentinThomazic
34f631ffc5
remove hard-coded gcc options (#1652) 2023-11-23 23:35:20 +01:00
Jalali
f9c7542e84
Generate Zcb extension instructions (#1617) 2023-11-14 08:18:28 +00:00
Anouar
55970d3921
Dvplan CSR embedded (#1606) 2023-11-13 10:17:44 +01:00
MarioOpenHWGroup
220f534b6d
Spike Tandem Implementation using VCS simulator (#1561) 2023-11-09 19:29:24 +01:00
Jalali
5a7bbafdab
Add unmapped Instructions tests to improve code coverage (#1608) 2023-11-08 16:08:19 +01:00
Jalali
24a8992611
CVA6-DV : Add ecall instruction into generate tests (#1604) 2023-11-07 18:01:31 +01:00
Côme
b2a59c9617
Convert DV into a submodule (#1591) 2023-11-03 11:20:08 +01:00
Jalali
797f0a90c6
Enable ZBA, ZBB, ZBC, ZBS in cva6 env & generated tests (#1587) 2023-10-31 19:55:08 +01:00
Jalali
e2a5250473
Updates to match the latest version of RISCV-DV (#1576) 2023-10-30 14:10:58 +01:00
Fatima Saleem
38b1da26c3
adding bitmanip and atomic arch-tests (#1560) 2023-10-20 16:03:12 +02:00
Jalali
03490e43a8
Update tests' description & enable hvp for coverage report (#1532) 2023-10-17 22:00:47 +02:00
Cesar Fuguet
7de1345291
Add the HPDcache as cache subsystem (#1513)
Add the HPDcache as another alternative for the cache subsystem.
The HPDcache is a highly configurable L1 Dcache that mainly targets high-performance systems.
2023-10-16 09:26:20 +02:00
AEzzejjari
350408c1ac
Code_Coverage: Display the coverage score at the end of the code coverage job (#1526) 2023-10-12 06:38:53 +02:00
Anouar
f3eaf4abc7
hvp vplan creation and sanity covergroup implementation (#1518) 2023-10-09 22:29:58 +02:00
JeanRochCoulon
5ee1a340e3
Wait for VCS license for vcs-uvm target (#1478) 2023-09-27 14:05:38 +02:00
Zbigniew Chamski
1683c818c4
Streamline installation process (Spike and toolchain variables, README file). (#1468) 2023-09-26 16:51:03 +02:00
JeanRochCoulon
16d078656c
Add option to wait for VCS license (#1476) 2023-09-26 07:05:56 +02:00
AEzzejjari
59863becc7
Code_Coverage: Exclude coverage of assertions, FSM, toggle of internal signals and constants (#1450) 2023-09-19 17:59:01 +02:00
Jalali
d8c3916ebc
Makefile : Fix env & tb path for the new repo (#1445) 2023-09-18 17:57:15 +02:00
Jean-Roch Coulon
b13530ccbc fix regress tests and makefiles
Co-authored-by: Côme Allart <come.allart@thalesgroup.com>
2023-09-07 11:38:34 +02:00
Côme Allart
736be43a73 move files to a verif directory 2023-09-07 09:50:50 +02:00