stnolting
7674ed12be
[docs] removed numerically-controlled oscillator (NCO) IO module
2021-06-27 14:53:02 +02:00
stnolting
0be769bf93
[docs] removed top's FIRQ inputs; added new FIFO component
2021-06-27 12:02:30 +02:00
stnolting
16cfbb63a0
✨ added console options to configure/customize build-in bootloader
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* updated according sections in data sheet and user guide
2021-06-26 20:03:10 +02:00
stnolting
7bd101b9c5
changed function type of "after main handler"
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void -> int
2021-06-26 11:20:33 +02:00
stnolting
6cb945f7c4
made bootloader even more HW configuration independent
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* GPIO is optional
* MTIME is optional
* SPI is optional
* UART is optional but highly recommended
general clean-up of bootloader source code
2021-06-25 18:00:37 +02:00
stnolting
f2e69a36b3
✨ [docs] added RISC-V "Zmmul" ISA extensions
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* implement mltiplication instructions only (no division instructions)
* sub-extensions of M extensions
* for size-constrained setups; requires ~50% less hardware than M extensions
* div[u] and rem[u] instructions will raise an illegal instruction exception
2021-06-24 15:58:16 +02:00
stnolting
27b59b5b84
removed obsolete TINY_SHIFT_EN generic; added new shifter co-processor
2021-06-21 16:51:42 +02:00
stnolting
43c418a8b9
[docs] made boot configuration more explicit: DIRECT and INDIRECT
2021-06-16 16:54:48 +02:00
stnolting
4314c3e500
made bootloader more configuration independent
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bootloader only uses the _first_ 512 bytes of the DMEM; hence, DMEM size is irrelevant as long it is >= 512 bytes
2021-06-16 16:28:49 +02:00
stnolting
5db75c72b5
[docs/datasheet] reworked "Executable Image Format" section
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+ minor clean-ups and fixes
2021-06-14 15:51:49 +02:00
stnolting
4931e97684
✨ reworked IMEM.ROM and BOOTROM memory concept
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* bootloader can use up to 32kb - synthesis will create an accordingly sized ROM
* linker script: now using logical instruction address space size of 2GB - bootloader or hardware sanity checks test if the application executable fits into the actual physical memory size, which is configured via the top generics
2021-06-14 15:50:45 +02:00
stnolting
771f8169ff
[docs/datasheet] minor fixes and clean-ups
2021-06-13 23:36:50 +02:00
stnolting
d441377a49
[docs/datasheet] minor updates, fixes, clean-ups
2021-06-13 17:45:26 +02:00
stnolting
6e1be7c394
📚 [docs/datasheet] rework (see commit description)
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* updated (boot config) generics
* added section "Memory Configuration"
* added section "Boot Configuration"
2021-06-13 17:13:29 +02:00
stnolting
6a190cfcd9
[docs] added notes regarding platform-specific memory mapping optimization
2021-06-12 22:01:51 +02:00
stnolting
bcb5ba5b10
[docs/datasheet] added IMEM/DMEM address space note #62
2021-06-12 20:07:28 +02:00
stnolting
43d91b1001
[docs/datasheet] minor edits
2021-06-11 21:09:56 +02:00
stnolting
145d49c24c
[docs/datasheet] fixed link to user guide
2021-06-11 16:15:28 +02:00
stnolting
4455f5f9da
[docs/datasheet, README] added project rationale (first draft)
2021-06-11 16:09:03 +02:00
stnolting
4739468841
[docs/datasheet] added ISA extensions to overview
2021-06-11 16:07:11 +02:00
stnolting
16e27df2b6
[README, docs] updated links to setups folder
2021-06-10 16:44:20 +02:00
stnolting
d086fc66da
[docs] minor link fixes
2021-06-08 16:47:58 +02:00
umarcor
8bfb75fc79
update refs to the templates in the docs, boards, etc.
2021-06-08 13:59:29 +02:00
stnolting
b5638c8a63
Merge pull request #60 from umarcor/doc/common-include
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[docs] add attrs.adoc and attrs.main.adoc
2021-06-08 12:01:56 +02:00
stnolting
fc4ba0f2e9
v1.5.6.7: added option to configure "async" Wishbone RX path
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* clean-up of Wishbone interface module (dead code removal)
* added new package constant `wb_rx_buffer_c` to configure SYNC (default) or ASYNC Wishbone RX path (allows trade-off between performance/latency and timing closure
2021-06-08 11:40:54 +02:00
umarcor
5b9316f5e7
[docs] add attrs.adoc and attrs.main.adoc
2021-06-08 10:18:09 +02:00
stnolting
529267dff5
[docs/datasheet] added OCD security note
2021-06-07 22:41:28 +02:00
stnolting
02e3a7d930
✨ [sw/common, docs] added option to register "after-main handler"; crt0 clean-up
2021-06-07 19:39:42 +02:00
stnolting
6d348950cc
[docs/datasheet] minor fixes
2021-06-07 19:20:51 +02:00
stnolting
39552d4620
hardware perf. counters (HPM): removed user-level access
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* removed `hpmcounter*` & `hpmcounter*h` CSRs
* according `mcountern` bits are hardwired to zero
* only machine-mode can access HPMs
2021-06-06 18:07:51 +02:00
stnolting
15393d2247
[docs/datasheet] minor edits
2021-06-06 00:39:33 +02:00
stnolting
c590cf16ad
removed debug mode stepie flag
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used to allow interrupts during single-stepping. stepie support in GCC/gdb is very poor + the debugger can emulate interrupt behaviour
2021-06-05 10:54:42 +02:00
stnolting
a5e4ab2f32
[docs/datasheet] minor typo fix
2021-06-05 00:32:27 +02:00
stnolting
3210dc9882
[docs/datasheet] minor edits
2021-06-04 21:34:05 +02:00
stnolting
37a105f10c
[docs/src_adoc/pwm] updated PWM module
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PWM module now allows to configure up to 60 channels
2021-06-04 21:17:30 +02:00
stnolting
75b60e0080
[docs/src_adoc] updated PWM configuration generic
2021-06-04 21:16:45 +02:00
stnolting
a8d91ebaaf
[rtl/core, docs/datasheet] reverted back to 32 CFS registers; relocated CFS base address
2021-06-04 21:12:19 +02:00
stnolting
53c3d41085
[README, docs/datasheet] minor typo/layout fixes
2021-06-04 16:42:01 +02:00
stnolting
8ab6d21bb7
[docs/datasheet] increased CFS register space to 64x4 bytes
2021-06-04 16:39:13 +02:00
stnolting
92422f097e
[docs/datasheet] added sections to processor generics
2021-06-04 16:36:01 +02:00
stnolting
5c440d94c8
[docs/datasheet] fixed link
2021-06-04 10:08:56 +02:00
umarcor
e78e43d15b
docs: split User Guide
2021-06-04 01:03:40 +02:00
