Commit graph

1819 commits

Author SHA1 Message Date
Pasquale Davide Schiavone
f7c2b64270 decoupled irq, debug with instr mem 2017-03-30 13:49:52 +02:00
Pasquale Davide Schiavone
6c679d41c4 optimized decoder-controller branch-jump signals 2017-03-28 10:56:16 +02:00
Pasquale Davide Schiavone
0eba7ea82c modified data load event 2017-03-27 17:58:05 +02:00
Pasquale Davide Schiavone
152309fadf Update README.md 2017-03-27 17:23:34 +02:00
Pasquale Davide Schiavone
b8a8b36cbb renamed module names and splitted interrupts and exceptions 2017-03-27 13:28:08 +02:00
Pasquale Davide Schiavone
27151a3f89 fixed multdiv_fast 2017-03-24 18:45:24 +01:00
Pasquale Davide Schiavone
040a808200 added VERILATOR ifdef and fix regfile ff 2017-03-22 18:20:14 +01:00
Pasquale Davide Schiavone
0266ddbd0b Headers updates 2017-03-21 17:27:31 +01:00
Pasquale Davide Schiavone
538ad537e0 Merge branch 'patch-1' into 'master'
Update README.md

See merge request !1
2017-03-20 17:46:47 +01:00
Pasquale Davide Schiavone
a9164fe21f Update README.md 2017-03-20 17:39:23 +01:00
Pasquale Davide Schiavone
311805d955 parameters for RV32E and RV32M 2017-03-17 19:10:00 +01:00
Pasquale Davide Schiavone
7ec2d7b41f mult div fast implemented 2017-03-13 16:17:21 +01:00
Pasquale Davide Schiavone
57ee554246 fixed tracer 2017-03-09 12:34:28 +01:00
Pasquale Davide Schiavone
fe8f4fdf8e Update muldiv module 2017-03-08 12:41:36 +01:00
Pasquale Davide Schiavone
b2a0944c19 saved one reg and implemented rem 2017-03-07 17:58:10 +01:00
Pasquale Davide Schiavone
99ffbe37af Implemented Div, Divu, Remu 2017-03-07 16:17:17 +01:00
Pasquale Davide Schiavone
c309bab3ca Mult slow and fast implemented 2017-03-06 15:14:36 +01:00
Pasquale Davide Schiavone
00325be31e Added mult files 2017-03-06 12:22:59 +01:00
Pasquale Davide Schiavone
3cffca4756 bought wooley multiplier 2017-03-06 11:42:46 +01:00
Pasquale Davide Schiavone
495a05c7f4 fixed jumps 2017-03-03 14:10:34 +01:00
Pasquale Davide Schiavone
ab7b00fbc6 fixed sleep after mret 2017-03-02 15:58:42 +01:00
Pasquale Davide Schiavone
371a292ee1 removed 'x assignment and updates 2017-03-02 12:44:26 +01:00
Pasquale Davide Schiavone
af5903f76f updates 2017-03-02 12:00:26 +01:00
Pasquale Davide Schiavone
480a02a417 small fix in branch 2017-02-28 17:39:45 +01:00
Pasquale Davide Schiavone
1f0eb756c7 small fixes 2017-02-28 17:37:11 +01:00
Pasquale Davide Schiavone
6840de0c2e Merge branch 'master' into MExtension_explore 2017-02-28 16:49:10 +01:00
Pasquale Davide Schiavone
94f042d9cd removed tracer 2017-02-28 16:48:52 +01:00
Pasquale Davide Schiavone
bd96611340 merge with new controller 2017-02-28 16:34:39 +01:00
Pasquale Davide Schiavone
68f89f184f Fixed debug and changed controller 2017-02-28 16:23:58 +01:00
Pasquale Davide Schiavone
f5048a1d11 added multipliers 2017-02-28 12:48:13 +01:00
Pasquale Davide Schiavone
c62fccd8fd update ready controller 2017-02-28 11:40:00 +01:00
Pasquale Davide Schiavone
764871c051 Updated 2017-02-17 10:02:26 +01:00
Pasquale Davide Schiavone
3d7b832ca6 General updates and renaming 2017-02-16 19:07:17 +01:00
Pasquale Davide Schiavone
25cc99c2da Delete THIS_CORE_IS_AUTOMATICALLY_GENERATATED!!!.txt 2017-02-16 16:58:59 +01:00
Pasquale Davide Schiavone
39e2627b82 update traces 2017-02-09 09:06:07 +01:00
Pasquale Davide Schiavone
908700afb8 clean cs_reg 2017-02-06 14:16:33 +01:00
Pasquale Davide Schiavone
c59865d710 fixed mimpid csr 2017-02-02 17:06:11 +01:00
Pasquale Davide Schiavone
1c7464551b added monitor for misaligned via assert 2017-01-31 15:23:50 +01:00
Pasquale Davide Schiavone
4ee57c2772 broken path branch and misaligned 2017-01-30 18:22:04 +01:00
Pasquale Davide Schiavone
46fe850b05 update tracer and elw 2017-01-27 16:16:13 +01:00
Pasquale Davide Schiavone
c24081a1b8 cleaning and small fixes 2017-01-27 11:47:43 +01:00
Pasquale Davide Schiavone
f80a14b7c2 disabled lsu error and fixed misaligned 2017-01-26 17:18:53 +01:00
Pasquale Davide Schiavone
3d2a02083f decoupled interrupts and exceptions 2017-01-20 19:08:45 +01:00
Pasquale Davide Schiavone
ca07ae7775 fix in tracer 2017-01-20 17:25:14 +01:00
Pasquale Davide Schiavone
a7b7aa390d fix synthax 2017-01-20 15:32:50 +01:00
Pasquale Davide Schiavone
e81e58d699 modified LSU Irq and the controller 2017-01-20 15:10:10 +01:00
Pasquale Davide Schiavone
9c68effb6b fixed decoder 2017-01-19 13:44:45 +01:00
Pasquale Davide Schiavone
11f0e4556d fixed ret and misaligned memory accesses 2017-01-18 16:25:31 +01:00
Pasquale Davide Schiavone
2d78d214de changed module names into littleriscv 2017-01-18 10:41:40 +01:00
Pasquale Davide Schiavone
dee7ba63a1 new irq handling 2017-01-17 19:41:48 +01:00