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1082 commits 21 branches 8 tags 70 MiB
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Author SHA1 Message Date
Sven Stucki
cdabd40c59 Improve tracer output slightly 2015-08-27 01:11:34 +02:00
Sven Stucki
302747b9e4 Fix c.sllr and c.srlr decoding 2015-08-27 01:11:10 +02:00
Andreas Traber
5b3ba2d1d6 Works, but bug in compressed decoder for sll 2015-08-26 22:57:49 +02:00
Sven Stucki
d324cfc01f IF Sync, problems in RVC 2015-08-26 19:13:09 +02:00
Sven Stucki
685b6dbabb Make illegal insn warning less verbose in simulation 2015-08-26 19:12:25 +02:00
Sven Stucki
a18972db26 Add c.nop 2015-08-26 19:11:54 +02:00
Sven Stucki
793d45f254 Fix illegal instruction exception throwed when not actually decoding an instruction 2015-08-26 18:14:00 +02:00
Sven Stucki
9efada0ffa Fix last commit, small cleanup 2015-08-26 17:21:35 +02:00
Sven Stucki
84bec09a64 Fix illegal RVC instructions not causing exceptions 2015-08-26 16:40:22 +02:00
Sven Stucki
8bdb45799f Fix jump_in_id signal should only be set in DECODE in controller 2015-08-26 15:22:49 +02:00
Sven Stucki
08b2be2b76 First version of optimized new IF stage, simplified a lot 2015-08-26 15:13:04 +02:00
Sven Stucki
384f160f2b Eliminate pc_mux_boot 2015-08-25 15:37:26 +02:00
Sven Stucki
b7d05855f8 Optimized IF intermediate step 2015-08-25 15:36:28 +02:00
Sven Stucki
20110184e6 IF Store (preparation for entirely new approach) 2015-08-25 15:36:28 +02:00
Sven Stucki
96b5d1940d Fix issue with cross line access and stalls, cleanup 2015-08-25 15:36:28 +02:00
Sven Stucki
08f2311745 Fix ack latching for jumps/branches 2015-08-25 15:36:28 +02:00
Sven Stucki
6f5367478f Fix ack handling in IF 2015-08-25 15:36:28 +02:00
Sven Stucki
67425b0f19 Fix LUI/AUIPC output of tracer 2015-08-25 15:36:28 +02:00
Sven Stucki
94aef4ec05 Small cleanup 2015-08-25 15:36:28 +02:00
Sven Stucki
0da283fb58 Fix instruction corruption issue in IF 2015-08-25 15:36:28 +02:00
Sven Stucki
0042daa8c9 Fix jump/branch problem in IF 2015-08-25 15:36:28 +02:00
Sven Stucki
4d02dc1490 Simplify instruction masks in defines 2015-08-25 15:36:28 +02:00
Sven Stucki
bd6e0d4d05 Small IF cleanup, add defines for branch types 2015-08-25 15:36:28 +02:00
Sven Stucki
a08f53928a Fix basic incr PC flow, ID PC miscalculation 2015-08-25 15:34:45 +02:00
Sven Stucki
0addc4f1bd IF stage sync. 2015-08-25 15:34:45 +02:00
Sven Stucki
a91cc2f0cb Remove some garbage 2015-08-25 15:34:45 +02:00
Sven Stucki
80ca650893 Intermediate commit, trying out some things 2015-08-25 15:34:45 +02:00
Sven Stucki
8e26797549 Add control FSM to IF stage 
Veeery messy, but works. Not the final form, needs a lot of cleanup.
 2015-08-25 15:34:45 +02:00
Sven Stucki
1f1ea049f4 Rename signals in instr_core_if 2015-08-25 15:34:44 +02:00
Sven Stucki
5ede08fc29 Remove instr_core_if and rewire I$ directly to IF stage 
This is a preliminary step for the new IF. The IF has not yet been updated -
the core won't work like this (work-in-progress!).
 2015-08-25 15:34:44 +02:00
Andreas Traber
e9d3ab56b7 Remove dead signals 2015-08-17 15:19:48 +02:00
Andreas Traber
aaf3aca410 Fuse dbg fsm and main control fsm 
=> less FSMs :-)
 2015-08-17 15:15:46 +02:00
Andreas Traber
f535f79bd8 Separate controller and decoder 2015-08-17 14:53:34 +02:00
Andreas Traber
39daf53892 Move debug from CS registers to debug unit as they do not need to be 
accessible from the core anyway
 2015-08-14 16:31:03 +02:00
Andreas Traber
73dd948f59 Working on debug support 
Most features have a preliminary support now, i.e. software breakpoints
work in general, NPC and PPC SPR are integrated and fully working, so it
is possible to set a new PC from the debugger

There are probably still some bugs in corner cases, and I'm pretty sure
jumps are not working nicely in single-stepping mode
 2015-08-10 17:00:02 +02:00
Sven Stucki
102691a06a Improve instruction tracer (added cycle count, formatting) 2015-08-06 14:16:41 +02:00
Sven Stucki
69b2473daa Fix instruction trace displaying immediates wrong 2015-08-06 02:39:50 +02:00
Sven Stucki
7c211e0da5 Fix constant names 2015-08-03 15:21:48 +02:00
Sven Stucki
55f211ab0a Cleanup defines 2015-08-03 15:01:03 +02:00
Sven Stucki
4ec8c090ad Add post-increment and reg-reg stores 2015-07-31 01:39:51 +02:00
Sven Stucki
57edf30a46 Minor controller cleanup 2015-07-28 15:04:28 +02:00
Sven Stucki
b4768564ce Added post increment loads, reg-reg loads and post-increment reg-reg loads 2015-07-28 14:58:14 +02:00
Sven Stucki
a1b4551804 Four more compressed instructions 2015-07-24 18:24:18 +02:00
Sven Stucki
d9b75c2ec0 Added vim swap file 2015-07-24 15:26:32 +02:00
Sven Stucki
bb2fbf8e54 Updated all file headers 2015-07-24 15:26:12 +02:00
Sven Stucki
10bc98382e More cleanup, fixed more warnings 2015-07-24 02:53:55 +02:00
Sven Stucki
f908f34fcf More warnings fixed 2015-07-23 02:30:44 +02:00
Sven Stucki
da7c740870 Fixed Verilator width warnings where appropriate 2015-07-23 01:59:45 +02:00
Sven Stucki
186245bc49 Cleanup; removed carry and overflow (mostly) 2015-07-23 01:20:57 +02:00
Sven Stucki
509c13dff8 Another compressed instruction, include guards for verilator 2015-07-21 17:57:49 +02:00