Andreas Traber
981cd4789b
Add block diagram to titlepage
2015-12-22 16:30:42 +01:00
Andreas Traber
cfc1a17419
Add the rest of the extended alu operations
2015-12-22 16:13:20 +01:00
Andreas Traber
5a0e624be7
Add description of most alu ext operations
2015-12-22 14:32:46 +01:00
Andreas Traber
e4cbf45209
Add chapters about hardware loops and multiply-accumulate
...
Add instruction specification of pulp extensions
2015-12-22 11:16:47 +01:00
Andreas Traber
dc8144a459
Added more information about debug to documentation
2015-12-21 14:54:37 +01:00
Andreas Traber
e9197db83c
Working on the documentation
2015-12-21 13:04:50 +01:00
Andreas Traber
2b8fdcd6d3
Update pc counters, branches taken were wrong
2015-12-16 11:17:37 +01:00
Andreas Traber
79cff74dfd
Fix a problem in the normal prefetch buffer, some instructions were performed twice
2015-12-15 23:42:08 +01:00
Andreas Traber
4ed498014b
Added taken branch performance counter and excluded jumps and branches
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in icache misses
2015-12-15 18:07:32 +01:00
Andreas Traber
a6c4f6d4ef
Make sure performance counters work correctly on FPGA
2015-12-15 13:57:26 +01:00
Andreas Traber
d84ae50481
Clean headers
2015-12-14 16:39:16 +01:00
Andreas Traber
4b9fc6af99
Added LICENSE file and started adding headers
2015-12-11 17:20:07 +01:00
Andreas Traber
ee89618b29
Fix a couple of errors regarding hwloops
2015-12-08 13:11:01 +01:00
Andreas Traber
aa9715f130
Rewrote prefetcher (again), this time it is actually quite nice
2015-12-08 04:59:17 +01:00
Andreas Traber
983ff5c164
Get rid of latch in prefetch buffer
2015-12-07 17:06:22 +01:00
Andreas Traber
c73c6acc85
Make sure that the correct register is accessed in ASIC for PCCRs
2015-12-07 17:01:27 +01:00
Andreas Traber
ac384a23d4
Fix write enable on cs registesr in hwlp
2015-12-07 16:52:22 +01:00
Andreas Traber
2c5e9b9407
Map hardware loop registers to CSR, so they can be saved/restored for
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irqs
2015-12-07 16:36:23 +01:00
Andreas Traber
5678ed7a75
Remove obsolete save_pc_if signal to cs registers
2015-12-07 15:41:22 +01:00
Andreas Traber
af8343d366
Fix hardware loops, reimplement prefetch buffer for pulp
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Change encoding of hardware loop setup instructions, displacement by one
bit and unsigned
2015-12-07 15:28:06 +01:00
Andreas Traber
0cb4f2620c
Save unaligned rdata already in fifo, so that it only consumes one word instead of two
2015-11-30 15:50:03 +01:00
Andreas Traber
371a211be7
Fix bugs introduced in the last two commits
2015-11-30 15:13:08 +01:00
Andreas Traber
965be8059a
Move unalignment selection into prefetch buffer
2015-11-30 14:09:51 +01:00
Andreas Traber
5de1132e47
Make prefetch buffer FIFO a bit smarter, should cut one mux
2015-11-30 13:29:04 +01:00
Andreas Traber
b79a2f48c0
Simplify assignments in if stage a tiny little bit
2015-11-30 13:20:05 +01:00
Andreas Traber
ca79740744
Make register file conform to normal naming convention
2015-11-27 18:12:19 +01:00
Andreas Traber
45ceee59f7
Fixed issue that hardware loops with same endpoint did not work
2015-11-27 11:25:28 +01:00
Andreas Traber
116379e098
Fix instruction tracing, removed collision between custom* and our opcodes
2015-11-27 10:54:37 +01:00
Andreas Traber
4e02286710
Remove branch_req_Q signal, no need for it anymore :-)
2015-11-23 16:53:49 +01:00
Andreas Traber
1673d3f62a
Make sure branches are only done once
2015-11-23 16:51:06 +01:00
Andreas Traber
81a5e04a62
Make sure there are no two branches that are taken back-to-back
2015-11-23 16:41:57 +01:00
Andreas Traber
5da32ba5ec
This should fix most of the debug features
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Basic test passes now, next step is to try and test it with an
interactive gdb
2015-11-19 14:17:07 +01:00
Andreas Traber
6ba66dc141
Rename mux select signals, allow for more aggressive optimizations in if
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stage
2015-11-19 13:45:56 +01:00
Andreas Traber
e5bb1447cc
Cleanup hwloops, use parameters instead of defines, and also make it
...
completely generic
The only dependency that limits the number of hwloops now is the
encoding, the rest adapts automatically
2015-11-19 11:51:26 +01:00
Andreas Traber
b0a9e37c63
Fix hwloops, registers were stalled when they should have been active
2015-11-19 11:16:39 +01:00
Andreas Traber
89fec097fb
Cleanup branch signals, remove old signals that were no longer used
2015-11-19 10:53:12 +01:00
Andreas Traber
f5d408d7f4
Add an instr_valid_id signal to completely decouple the pipeline stages,
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hopefully fixes the exception controller
2015-11-18 19:44:05 +01:00
Andreas Traber
4a166db65b
rename signals and try to make the whole thing a tiny bit faster
2015-11-18 19:44:05 +01:00
Andreas Traber
8a8b406a6c
Finally restyle the debug unit
2015-11-18 17:57:58 +01:00
Andreas Traber
cb73d88ed2
Fix a bug in the PCER CSR registers, it was not possible to activate more than the basic performance counter
2015-11-18 17:22:07 +01:00
Andreas Traber
c7cec664ac
Merge remote-tracking branch 'origin/master' into exc_ctrl
2015-11-17 10:36:15 +01:00
Sven Stucki
ec00ad8376
Add lp.setupi instruction
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Hardware loops now have their own adder and no longer share it with the jump
target calculation.
The new lp.setupi instruction makes it possible to truly setup hardware loops
with a single instruction. For the lp.setup instruction, a register with the
counter had to be prepared first. The range of the new instruction is quite
limited though, it uses the shifted z-imm (5 bit, unsigned).
2015-11-03 17:44:17 +01:00
Sven Stucki
c001c323de
Change PULP custom opcodes
2015-11-03 15:38:23 +01:00
Sven Stucki
b99a8b90ba
Raise an illegal instruction exception for ecall/scall instructions.
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Those instructions are no yet supported by the (exception) controller and have
been ignored until now. By causing an exception, they can at least be handled
in software if needed in the future.
2015-11-02 13:35:48 +01:00
Sven Stucki
286b82146c
Remove some spaces
2015-10-30 13:50:16 +01:00
Sven Stucki
98eb2cc044
Fix debug breakpoints and single-step with branches in ID
2015-10-29 14:12:50 +01:00
Sven Stucki
a770811ad4
Fix debug breakpoints (dbg_set_npc)
2015-10-29 14:01:53 +01:00
Sven Stucki
0fcdbf130f
Add test_en to register file clock gates
2015-10-28 12:47:33 +01:00
Andreas Traber
9532d68a71
Add test_en to core and propagate it to manual clock gates
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Change line endings in register file to unix
2015-10-28 10:11:16 +01:00
Sven Stucki
82cf8ec258
Fix PPC/NPC tracking of debug unit
2015-10-27 18:31:49 +01:00
